1. Field of the Invention
This invention relates to an apparatus and method for measuring electrical properties of a semiconductor wafer, or a coating or film on the semiconductor wafer.
2. Description of Related Art
The determination of electrical properties of a semiconductor wafer, or a coating or film thereon, is a critical factor in the production of such wafers. In current standard practice, measurements of these electrical properties have been accomplished by first fabricating one or more metal or doped polysilicon contacts on the top surface. These contacts become part of a metal oxide semiconductor (MOS) or Schottky barrier structure that is used to make the appropriate measurement. In other words, these contacts become permanent features on the semiconductor wafer, or the coating or film thereon, thereby making the entire semiconductor wafer unfit for normal use. Thus, these contacts are only formed on monitor or test semiconductor wafers.
In addition, fabrication of the metal or polysilicon contacts is time-consuming and costly. It typically involves depositing and forming metal or polysilicon contacts on the surface of the semiconductor wafer in a manner known in the art.
An alternative to these fabricated contacts is described in an article entitled “Vacuum Operated Mercury Probe for CV Plotting and Profiling” by Albert Lederman, Solid State Technology, August 1981, pp. 123-126. This article discloses utilizing mercury contacts to replace aluminum or polysilicon contacts. More specifically, the Lederman article discloses a vacuum operated mercury probe for performing measurements of metal oxide semiconductors, homogeneous semiconductor wafers, non-homogeneous semiconductor wafers, and semiconductor wafers on insulating substrates. Problems may arise utilizing the Lederman mercury probe in that mercury may react chemically with the materials on the wafer under study. Mercury can also pose a significant safety problem in its use under some conditions. Thus, a mercury probe has limited application.
An alternative to fabricated contacts or vacuum operated mercury probes is disclosed in U.S. Pat. No. 5,023,561 to Hillard which issued on Jun. 11, 1991 and which is incorporated herein by reference.
The Hillard patent discloses a kinematic probe arm having at one end thereof a probe including a tip having a uniformly flat surface of predetermined dimensions. A probe stand supports the kinematic arm and a chuck supports the semiconductor wafer. The probe stand, the kinematic arm, and the chuck are configured so that a planar contact can be realized between the uniformly flat surface of the tip and the outer surface of the dielectric layer of the semiconductor wafer.
A problem with utilizing the probe disclosed in the Hillard patent for performing measurements is the need to grind the surface of the tip uniformly flat. Another problem is the need to establish a planar contact between the uniformly flat surface of the tip and the surface of the wafer. The use of a uniformly flat surface of the tip to form a planar contact with the outer surface of the wafer is particularly a problem with today's very thin oxide layers since a lack of perfect parallelism between the uniformly flat surface of the tip and the outer surface of the wafer may result in an edge surrounding the uniformly flat surface of the tip damaging the oxide layer.
In addition, when the Hillard patent was filed in the early 1990's, a typical gate oxide thickness in the semiconductor industry was on the order of hundreds of angstroms. The relatively small planar contact area between the uniformly flat surface of the tip of the probe and the outer surface of the dielectric layer of the wafer resulted in a poor capacitance signal-to-noise ratio when applied to these relatively thick oxides. In contrast, today gate oxides are very thin, on the order of 1.0-1.5 nm. With such thin oxides, the capacitance signal-to-noise ratio is increased whereby measurements made with conductive pressure contacts can be effectively utilized to characterize gate oxides.
An alternative to the use of the kinematic probe arm and the probe including a tip having a uniformly flat surface is disclosed in U.S. Pat. No. 6,492,827 to Mazur et al. which issued on Dec. 10, 2002 and which is incorporated herein by reference.
The Mazur et al. patent discloses the use of a probe having an elastically deformable conductive tip that is moveable into contact with a semiconducting material forming an outer surface of a semiconductor wafer, or with a dielectric formed on the outer surface of the semiconductor wafer. A test apparatus applies a stimulus between the conductive tip and the semiconductor wafer and measures a response of the semiconductor wafer and, if provided, the dielectric formed on the front surface thereof for determining at least one electrical property of the semiconducting material of the semiconductor wafer and/or the dielectric.
The contact force between the probe tip of the probe disclosed in the Mazur et al. patent and the wafer must be controlled to avoid damaging the semiconducting material and/or the dielectric of the semiconductor wafer. This is especially important when the probe tip is utilized to contact the very thin gate oxides on today's semiconductor wafers.
It is, therefore, desirable to provide a probe having a tip wherein the contact force between the tip and the topside of the semiconductor wafer can be more accurately controlled. Still other desirable features will become apparent to those of ordinary skill in the art upon reading and understanding the following detailed description.